In recent years, as an approach to reducing the size of a semiconductor device and enhancing its performance, packaging techniques that semiconductor substrates of single-crystal silicon (hereinafter called silicon substrates) are stacked and electrically coupled using microelectrode wires have been developed.
Among these packaging techniques, a technique which has been recently attracting attention is that the integrated circuits formed on plural silicon substrates are electrically coupled with each other using so-called bumps as microelectrodes for joining silicon substrates and so-called through silicon vias as electrodes penetrating silicon substrates.
In the case of a semiconductor device based on the above technique, the junction reliability of the bumps for joining silicon substrates would deteriorate due to stress such as heat or impact applied to the silicon substrates. For this reason, it is imperative to protect the bumps by sealing the areas around the bumps with insulator such as resin in order to assure the junction reliability of the bumps.
NCP (non-conductive paste)/NCF (non-conductive film) is used as a method for sealing the areas around the bumps with resin. In this method, prior to bonding two silicon substrates (for example, silicon wafers) with bumps formed thereon, thermosetting resin, typically epoxy resin, is coated on each silicon substrate and after that, the two silicon substrates are heated and pressure-bonded to couple the bumps electrically.
However, the above pre-coating method has the following problem: resin adhering to the junction surface between bumps may get into a gap between the bumps during the heating and pressure-bonding process. This may result in an increase in the contact resistance between the bumps or cause the bumps to fail to contact each other, leading to deterioration in the reliability in the junction of the bumps.
Therefore, in order to prevent the resin from getting to the junction surface between the bumps, several techniques have been proposed that the resin covering the bumps is partially removed to expose the junction surface and junction between bumps and bonding between resin films are performed simultaneously.
For example, Japanese Unexamined Patent Application Publication No. 2003-188343 discloses a technique that after a resin film whose thickness is larger than the height of bumps is coated on the main surface of an LSI chip with bumps formed thereon, the resin is polished until the top of each bump is exposed. This makes it possible to join two LSI chips (join the bumps and bond the resin films together) with no resin on the junction surface between bumps. Hereinafter the technique described in Japanese Unexamined Patent Application Publication No. 2003-188343 is called related example 1.
However, the related example 1 has a problem that since it is difficult to polish and flatten the resin junction surface, air may be trapped on the junction surface between the resin films and become a void.
With this background, Japanese Unexamined Patent Application Publication No. 2008-078419 proposes a technique that a channel is made in the resin around each bump and such channels are interconnected and the interconnected channels extend to the ends of the silicon substrates to allow the air trapped between the two silicon substrates to escape outside. Hereinafter the technique described in Japanese Unexamined Patent Application Publication No. 2008-078419 is called related example 2.
FIG. 22 is a plan view showing the essential part of the main surface of a silicon wafer 30A before the bonding step in the related example 2. In FIG. 22, scribe lines SL as indicated by dotted lines represent lines along which dicing is performed to divide the silicon wafer 30A into silicon chips. This structure is created as follows: after pillar bumps 31 are formed on the main surface of the silicon wafer 30A, resin 32 is coated on it and the resin 32 around the bumps 31 is removed by photolithography or etching. The channels made by removal of the resin 32 around the bumps 31 are communicated with each other and the ends of the channels 33 extend to the periphery of the silicon wafer 30A.
FIG. 23 is a sectional view schematically showing the structure after the bonding step in the related example 2. A bump 31 and a resin film 32 around it are formed on the main surface of a first silicon wafer 30A and a channel 33 is made between them. Similarly, a bump 31 and a resin film 32 surrounding it are formed on the main surface of a second silicon wafer 30B and a channel 33 is made between them. Therefore, when the main surface of the first silicon wafer 30A and the main surface of the second silicon wafer 30B are bonded together with both the surfaces facing each other, a cavity 34 for air ventilation is made around the bump 31.